ATMEGA16A-PU Atmel, ATMEGA16A-PU Datasheet - Page 221

MCU AVR 16K FLASH 16MHZ 40-PDIP

ATMEGA16A-PU

Manufacturer Part Number
ATMEGA16A-PU
Description
MCU AVR 16K FLASH 16MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
22.9
22.9.1
8154B–AVR–07/09
Register Description
ADMUX – ADC Multiplexer Selection Register
Table 22-2.
Example:
• Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external
reference voltage is being applied to the AREF pin.
Table 22-3.
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see
page
Bit
Read/Write
Initial Value
V
:.
V
V
V
:.
V
V
REFS1
ADCn
ADCm
ADCm
ADCm
ADCm
ADCm
ADMUX = 0xED (ADC3 - ADC2, 10x gain, 2.56V reference, left adjusted result)
Voltage on ADC3 is 300 mV, voltage on ADC2 is 500 mV.
ADCR = 512 * 10 * (300 - 500) / 2560 = -400 = 0x270
ADCL will thus read 0x00, and ADCH will read 0x9C. Writing zero to ADLAR right adjusts
the result: ADCL = 0x70, ADCH = 0x02.
0
0
1
1
224.
+ 1/512 V
- 1/512 V
- 511/512 V
- V
REF
REFS0
/GAIN
Correlation between Input Voltage and Output Codes (Continued)
Voltage Reference Selections for ADC
0
1
0
1
REFS1
REF
REF
R/W
7
0
REF
/GAIN
/GAIN
/GAIN
Voltage Reference Selection
AREF, Internal Vref turned off
AVCC with external capacitor at AREF pin
Reserved
Internal 2.56V Voltage Reference with external capacitor at AREF pin
REFS0
R/W
6
0
ADLAR
R/W
5
0
Read code
:.
0x001
0x000
0x3FF
:.
0x201
0x200
MUX4
R/W
4
0
“ADCL and ADCH – The ADC Data Register” on
MUX3
R/W
3
0
Corresponding Decimal Value
:.
1
0
-1
:.
-511
-512
MUX2
R/W
2
0
Table
MUX1
R/W
1
0
ATmega16A
22-3. If these bits are
MUX0
R/W
0
0
ADMUX
221

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