MCHC908GR8CFAE Freescale Semiconductor, MCHC908GR8CFAE Datasheet - Page 192

• Manufacturer Part Number: MCHC908GR8CFAE
• Description: IC MCU FLSH 8BIT8MHZ 7.5K32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08G
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Monitor ROM (MON)
15.4.1 Entering Monitor Mode
Technical Data
192
The monitor code has been updated from previous versions to allow
enabling the PLL to generate the internal clock, provided the reset vector
is blank, when the device is being clocked by a low-frequency crystal.
This addition, which is enabled when IRQ is held low out of rest, is
intended to support serial communication/ programming at 9600 baud in
monitor mode by stepping up the external frequency (assumed to be
32.768 kHz) by a fixed amount to generate the desired internal
frequency (2.4576 MHz). Since this feature is enabled only when IRQ is
held low out of reset, it cannot be used when the reset vector is not blank
because entry into monitor mode in this case requires V
Table 15-1
specified in the table, monitor mode may be entered after a power-on
reset (POR) and will allow communication at 9600 baud provided one of
the following sets of conditions is met:
1. If $FFFE and $FFFF contain values not cared:
2. If $FFFE and $FFFF contain $FF, blank state:
3. If $FFFE and $FFFF contain $FF, blank state:
Freescale Semiconductor, Inc.
For More Information On This Product,
– The external clock is 9.8304 MHz
– IRQ = V
– The external clock is 9.8304 MHz
– IRQ = V
– The external clock is 32.768 kHz (crystal)
– IRQ = V
pullup; PLL off)
32.768 kHz to an internal bus frequency of 2.4576 MHz)
shows the pin conditions for entering monitor mode. As
Go to: www.freescale.com
Monitor ROM (MON)
DD
TST
SS
(this setting initiates the PLL to boost the external
(this can be implemented through the internal IRQ
(PLL off)
MC68HC908GR8 — Rev 4.0
TST
on IRQ.
MOTOROLA