MCHC908GR8CFAE Freescale Semiconductor, MCHC908GR8CFAE Datasheet - Page 225

IC MCU FLSH 8BIT8MHZ 7.5K32-LQFP

MCHC908GR8CFAE

Manufacturer Part Number
MCHC908GR8CFAE
Description
IC MCU FLSH 8BIT8MHZ 7.5K32-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MCHC908GR8CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
7.5KB (7.5K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
384Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08G
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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16.7 Port E
16.7.1 Port E Data Register
MC68HC908GR8 — Rev 4.0
MOTOROLA
NOTE:
Function:
Alternate
Address:
Port E is a 2-bit special-function port that shares two of its pins with the
serial communications interface (SCI) module.
The port E data register contains a data latch for each of the two port E
pins.
PTE1 and PTE0 — Port E Data Bits
Data direction register E (DDRE) does not affect the data direction of
port E pins that are being used by the SCI module. However, the DDRE
bits always determine whether reading port E returns the states of the
latches or the states of the pins. See
RxD — SCI Receive Data Input
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
PTE1 and PTE0 are read/write, software programmable bits. Data
direction of each port E pin is under the control of the corresponding
bit in data direction register E.
The PTE1/RxD pin is the receive data input for the SCI module. When
the enable SCI bit, ENSCI, is clear, the SCI module is disabled, and
the PTE1/RxD pin is available for general-purpose I/O. See
Communications Interface
For More Information On This Product,
$0008
Bit 7
0
Go to: www.freescale.com
Figure 16-17. Port E Data Register (PTE)
Input/Output Ports (I/O)
= Unimplemented
6
0
5
0
(SCI).
Unaffected by reset
4
0
Table
3
0
16-6.
2
0
Input/Output Ports (I/O)
PTE1
RxD
1
Technical Data
Serial
PTE0
Bit 0
TxD
Port E
225

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