AT91SAM7X128-CU Atmel, AT91SAM7X128-CU Datasheet - Page 59

• Manufacturer Part Number: AT91SAM7X128-CU
• Description: MCU ARM 128K HS FLASH 100-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7X128-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.2.2.2
13.2.3
6120H–ATARM–17-Feb-09
Brownout Manager
NRST External Reset Control
The Reset State Manager asserts the signal ext_nreset to assert the NRST pin. When this
occurs, the “nrst_out” signal is driven low by the NRST Manager for a time programmed by the
field ERSTL in RSTC_MR. This assertion duration, named EXTERNAL_RESET_LENGTH, lasts
2
and 2 seconds. Note that ERSTL at 0 defines a two-cycle duration for the NRST pulse.
This feature allows the Reset Controller to shape the NRST pin level, and thus to guarantee that
the NRST line is driven low for a time compliant with potential external devices connected on the
system reset.
Brownout detection prevents the processor from falling into an unpredictable state if the power
supply drops below a certain level. When VDDCORE drops below the brownout threshold, the
brownout manager requests a brownout reset by asserting the bod_reset signal.
The programmer can disable the brownout reset by setting low the bod_rst_en input signal, i.e.;
by locking the corresponding general-purpose NVM bit in the Flash. When the brownout reset is
disabled, no reset is performed. Instead, the brownout detection is reported in the bit BODSTS
of RSTC_SR. BODSTS is set and clears only when RSTC_SR is read.
The bit BODSTS can trigger an interrupt if the bit BODIEN is set in the RSTC_MR.
At factory, the brownout reset is disabled.
Figure 13-3. Brownout Manager
(ERSTL+1)
Slow Clock cycles. This gives the approximate duration of an assertion between 60 µs
bod_rst_en
brown_out
AT91SAM7X512/256/128 Preliminary
RSTC_SR
BODSTS
RSTC_MR
BODIEN
interrupt
sources
Other
bod_reset
rstc_irq
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