M29W640GB60ZA6E NUMONYX, M29W640GB60ZA6E Datasheet - Page 34

• Manufacturer Part Number: M29W640GB60ZA6E
• Description: Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8/4M x 16 60ns 48-Pin TFBGA Tray
• Manufacturer: NUMONYX

Specifications of M29W640GB60ZA6E

• Package: 48TFBGA
• Cell Type: NOR
• Density: 64 Mb
• Architecture: Sectored
• Block Organization: Asymmetrical
• Location Of Boot Block: Bottom
• Typical Operating Supply Voltage: 3|3.3 V
• Sector Size: 8KByte x 8|64KByte x 127
• Timing Type: Asynchronous
• Operating Temperature: -40 to 85 °C
• Interface Type: Parallel

Table 10.
1. X Don’t Care, PA Program Address, PD Program Data, BA any address in the Block. All values in the table are in
2. The maximum number of cycles in the command sequence is 36. N+1 is the number of words to be programmed during the
3. Each buffer has the same A4-A22 addresses. A0-A3 are used to select a word within the N+1 word page.
4. The 6th cycle has to be issued N time. WBL scans the word inside the page.
5. BA must be identical to the address loaded during the Write to buffer and Program 3rd and 4th cycles.
34/90
Read/Reset
Auto Select
Program
Double Word
Program
Quadruple Word
Program
Unlock Bypass
Unlock Bypass
Program
Unlock Bypass Reset
Write to Buffer and
Program
Write to Buffer and
Program Abort and
Reset
Write to Buffer and
Program Confirm
Chip Erase
Block Erase
Program/Erase
Suspend
Program/Erase
Resume
Read CFI Query
Enter Extended Block
Exit Extended Block
hexadecimal.
The command interface only uses A–1, A0-A10 and DQ0-DQ7 to verify the commands; A11-A20, DQ8-DQ14 and DQ15
are don’t care. DQ15A–1 is A–1 when BYTE is V
write to buffer and program operation.
Command
Commands, 16-bit mode, BYTE = V
N+5
6+
1
3
3
4
3
5
3
2
2
3
1
6
1
1
1
3
4
Addr Data Addr Data
BA
555
555
555
555
555
555
555
555
555
555
555
555
55
X
X
X
X
X
(5)
1st
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
A0
B0
F0
50
56
90
29
30
98
2AA
2AA
2AA
PA0
PA0
2AA
2AA
2AA
2AA
2AA
2AA
2AA
PA
X
IL
2nd
or DQ15 when BYTE is V
PD0
PD0
PD
55
55
55
55
00
55
55
55
55
55
55
IH
(1)
Addr
PA1
PA1
555
555
555
555
555
555
555
555
BA
X
Bus write operations
3rd
Data Addr Data Addr Data Addr Data
PD1
PD1
A0
F0
20
F0
90
25
80
80
88
90
IH
.
PA2
555
555
BA
PA
X
4th
PD2
N
PD
AA
AA
00
(2)
PA
PA3
2AA
2AA
(3)
5th
PD3
PD
55
55
WBL
555
BA
(4)
6th
PD
10
30