r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1165

Manufacturer Part Number

r5s77631ay266bgv

Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series

Manufacturer

Renesas Electronics Corporation.

In serial transmission, the SCIF operates as described below.

1. When data is written into SCFTDR, the SCIF transfers the data from SCFTDR to SCTSR and

2. When data is transferred from SCFTDR to SCTSR and transmission is started, consecutive

3. The SCIF checks the SCFTDR transmit data at the timing for sending the stop bit. If data is

starts transmitting. Confirm that the TDFE flag in SCFSR is set to 1 before writing transmit

data to SCFTDR. The number of data bytes that can be written is at least 64 − (transmit trigger

transmit operations are performed until there is no transmit data left in SCFTDR. When the

number of transmit data bytes in SCFTDR falls to or below the transmit trigger number set in

SCFCR, the TDFE flag is set. If the TIE bit in SCSCR is set to 1 at this time, a transmit-FIFO-

data-empty interrupt (TXI) request is generated.

The serial transmit data is sent from the SCIF_TXD pin in the following order.

(a) Start bit: One 0-bit is output.

(b) Transmit data: 8-bit or 7-bit data is output in LSB-first order.

(d) Stop bit(s): One or two 1-bits (stop bits) are output.

(e) Mark state: 1 is output continuously until the start bit that starts the next transmission is

present, the data is transferred from SCFTDR to SCTSR, the stop bit is sent, and then serial

transmission of the next frame is started.

If there is no transmit data after the stop bit is sent, the TEND flag in SCFSR is set to 1, the

stop bit is sent, and then the line goes to the mark state in which 1 is output from the

SCIF_TXD pin.

output can also be selected.

Section 27 Serial Communication Interface with FIFO (SCIF)

Rev. 1.00 Oct. 01, 2007 Page 1099 of 1956

REJ09B0256-0100