r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 707

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
16.4.2
PLLCR is a 32-bit readable/writable register that enables or disables clock output from the
CLKOUT pin. PLLCR can be accessed only in longwords.
Note:
Initial value:
Initial value:
Bit
31 to 15
14, 13
12 to 2
1
0
R/W:
R/W:
Bit:
Bit:
*
PLL Control Register (PLLCR)
Bit Name
CKOFF
CKONE
Depends on the clock operating mode that is selected by the MD0 to MD2 pin settings.
31
15
R
0
R
0
30
14
R
R
0
1
Initial
Value
All 0
All 1
All 0
0
1
29
13
R
R
0
1
28
12
R
R
0
0
R/W
R
R
R
R/W
R/W
27
11
R
R
0
0
26
10
R
R
0
0
Description
Reserved
The write value should be the same as the initial
values.
Reserved
The write value should be the same as the initial
values.
Reserved
The write value should be the same as the initial
values.
CLKOUT Output Stop
0: Clock is output from the CLKOUT pin.
1: Clock is not output from the CLKOUT pin.
Clock Output Enable
Selects whether to output clock from the CLKOUT pin
or tie the CLKOUT pin to a low level during software
standby mode.
0: Tied to a low level
1: Clock is output
25
(The pin level is low.)
R
R
0
9
0
24
R
R
0
8
0
23
R
R
0
7
0
Rev. 1.00 Oct. 01, 2007 Page 641 of 1956
Section 16 Clock Pulse Generator (CPG)
22
R
R
0
6
0
21
R
R
0
5
0
20
R
R
0
4
0
19
R
R
0
3
0
REJ09B0256-0100
18
R
R
0
2
0
CKOFF
R/W
17
R
0
1
0
CKONE
R/W
16
R
0
0
1

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