r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 539

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
(14) PCI Memory Base Address Register 0 (PCIMBAR0)
This register packages the memory space base address register of the PCI configuration register
that is prescribed with PCI local bus specification.
Refer to Section 13.4.4 (1), Accessing This LSI Address Space.
Initial value:
Initial value:
Bit
31 to 20 MBA
19 to 4
3
PCI R/W:
PCI R/W:
SH R/W:
SH R/W:
Bit:
Bit:
Bit Name
(upper)
MBA
(lower)
LAP
R/W
R/W
31
15
R
R
0
0
R/W
R/W
30
14
R
R
0
0
R/W
R/W
Initial
Value
H'000
H'0000 SH: R
0
29
13
R
R
0
0
R/W
R/W
28
12
R
R
0
0
R/W
SH: R/W
PCI: R/W
PCI: R
SH: R
PCI: R
R/W
R/W
27
11
R
R
0
0
MBA (upper)
MBA (lower)
R/W
R/W
26
10
R
R
0
0
Description
Memory Space 0 Base Address (upper 12 bits)
Specifies the upper 12 bits of memory base address
that corresponds the local address space 0
(SuperHyway bus address space of this LSI).
Update value
PCILSR [28:20]
0 0000 0000
0 0000 0001
0 0000 0011
0 1111 1111
1 1111 1111
Memory Space 0 Base Address (lower 16 bits)
These bits are fixed H'0000 by hardware.
Prefetch Control
Indicates whether or not local address space 0 is
prefetchable.
0: Not prefetchable
1: Prefetchable (not supported)
R/W
R/W
25
R
R
0
9
0
|
R/W
R/W
24
R
R
0
8
0
R/W
R/W
23
R
R
0
7
0
Rev. 1.00 Oct. 01, 2007 Page 473 of 1956
R/W
R/W
22
R
R
0
6
0
Address space Effective bit of
1 Mbyte
2 Mbytes
4 Mbytes
256 Mbytes
512 Mbytes
|
R/W
R/W
21
R
R
0
5
0
Section 13 PCI Controller (PCIC)
R/W
R/W
20
R
R
0
4
0
LAP
19
R
R
R
R
0
3
0
MBA (upper)
[31:20]
[31:28]
[31:29]
[31:21]
[31:22]
|
REJ09B0256-0100
MBA (lower)
18
R
R
R
R
0
2
0
LAT
17
R
R
R
R
0
1
0
ASI
16
R
R
R
R
0
0
0

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