r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1301

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

(2)
The transmit sources and receive sources are signals indicating the SIOF state; after being set, if
the state changes, they are automatically cleared by the SIOF.
When the DMA transfer is used, a DMA transfer request of the FIFO is disabled for one cycle at
the end of that DMA transfer.
(3)
On occurrence of each of the errors indicated as a status in SISTR, the SIOF performs the
following operations.
• Transmit FIFO underflow (TFUDF)
• Transmit FIFO overflow (TFOVF)
• Receive FIFO overflow (RFOVF)
• Receive FIFO underflow (RFUDF)
• FS error (FSERR)
• Assign error (SAERR)
The immediately preceding transmit data is again transmitted.
The contents of the transmit FIFO are protected, and the write operation causing the overflow
is ignored.
Data causing the overflow is discarded and lost.
An undefined value is output on the bus.
The internal counter is reset according to the signal in which an error occurs.
 If the same slot is assigned to both serial data and control data, the slot is assigned to serial
 If the same slot is assigned to two control data items, data cannot be transferred correctly.
Regarding Interrupt Source
Processing when Errors Occur
data.
Rev. 1.00 Oct. 01, 2007 Page 1235 of 1956
Section 29 Serial I/O with FIFO (SIOF)
REJ09B0256-0100