r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1510

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 34 Serial Sound Interface (SSI)
(7)
There are several more configuration bits in non-compressed mode which will now be
demonstrated. These bits are NOT mutually exclusive, however some configurations will probably
not be useful for any other device.
They are demonstrated by referring to the following basic sample format shown in figure 34.9.
Rev. 1.00 Oct. 01, 2007 Page 1444 of 1956
REJ09B0256-0100
SSI_SDATA
SSI_SCK
Configuration Fields - Signal Format Fields
SSI_WS
SWL = 6 bits (not attainable in SSI module, demonstration only)
DWL = 4 bits (not attainable in SSI module, demonstration only)
CHNL = 00, SCKP = 0, SWSP = 0, SPDP = 0, SDTA = 0, PDTA = 0, DEL = 0, MUEN = 0
4-bit data samples continuously written to SSITDR are transmitted onto the serial audio bus.
Key for this and following diagrams:
TDn
TD28
0
1
(Transmit Mode with Example System/Data Word Length)
0
Arrow head indicates sampling point of receiver
Bit n in SSITDR
means a low level on the serial bus (padding or mute)
means a high level on the serial bus (padding)
0
TD31 TD30 TD29 TD28
Figure 34.9 Basic Sample Format
1st channel
0
0
TD31 TD30 TD29 TD28
2nd channel
0
0
TD31