r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1344

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 30 SIM Card Module (SIM)
30.5
The following matters should be noted when using the smart card interface.
(1)
When SCSMPL holds its initial value, the smart card interface operates at a basic clock frequency
372 times the transfer rate.
During reception, the smart card interface samples the falling edge of the start bit using the serial
clock for internal synchronization. Receive data is captured internally at the rising edge of the
186th serial clock pulse. This is shown in figure 30.7.
Hence the receive margin can be expressed as follows.
Formula for receive margin in smart card mode:
Rev. 1.00 Oct. 01, 2007 Page 1278 of 1956
REJ09B0256-0100
Received data
Basic clock
Synchronization
sampling timing
Data sampling
timing
where
M: Receive margin (%)
N: Ratio of the bit rate to the clock (N = 372)
D: Clock duty (D = 0 to 1.0)
L: Frame length (L = 10)
Receive Data Timing and Receive Margin
(RXD)
M ＝
Usage Notes
（0.5 − ）−（ L−0.5 ）F−
Figure 30.7 Receive Data Sampling Timing in Smart Card Mode
0
186 clock pulses
2N
1
Start bit
372 clock pulses
185
｜D − 0.5｜
371
N
0
（L＋F）×100％
D0
185
371
0
D1