r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1234

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 28 Serial Communication Interface with FIFO/IrDA Interface (SCIF/IrDA)
(4)
Figure 28.14 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Rev. 1.00 Oct. 01, 2007 Page 1168 of 1956
REJ09B0256-0100
Note: In clock synchronous mode, when transmit data is written to the SCFTDR by the DMAC,
Serial Data Transmission (Clocked Synchronous Mode)
the TEND flag may no be cleared. Therefore, if the DMAC is used for transmission in
clock synchronous mode, read the TEND flag in the following method.
1. Confirm data transfer completion on the DMAC side.
2. Read the TEND flag.
3. Clear the TEND flag to 0 when TEND = 1.
4. Read the TEND flag again.
5. Use the TEND flag read for the second time.
Write transmit data to SCFTDR
Read TEND flag in SCFSR
Clear TE bit in SCSCR to 0
Read TDFE flag in SCFSR
TEND flag in SCFSR to 0
and clear TDFE flag and
Start of transmission
All data transmitted?
End of transmission
Initialization
TDFE = 1?
TEND = 1?
Figure 28.14 Sample Serial Transmission Flowchart
Yes
Yes
Yes
No
No
No
[1]
[2]
[3]
[1] SCIF initialization:
[2] SCIF status check and transmit data write:
[3] Serial transmission continuation procedeure:
See sample SCIF initialization flowchart in figure 28.13.
Read SCFSR and check that the TDFE flag is set to 1,
then write transmit data to SCFTDR, and clear
the TDFE flag to 0.
To continue serial transmission, read 1 from the TDFE
flag to confirm that writing is possible, them write data
to SCFTDR, and then clear the TDFE flag to 0.