r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 588

Manufacturer Part Number

r5s77631ay266bgv

Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series

Manufacturer

Renesas Electronics Corporation.

Section 13 PCI Controller (PCIC)

(25) PCI Cache Snoop Control Register 1 (PCICSCR1)

An external device can access local memory of this LSI via the PCIC. When an external PCI

device accesses cacheable areas of this LSI, the PCIC can support cache snoop function to the on-

chip caches. The PCICSCR1 specifies this function that uses cache snoop address registers 1.

Refer to section 13.4.4 (7), Cache Coherency.

Rev. 1.00 Oct. 01, 2007 Page 522 of 1956

REJ09B0256-0100

Initial value:

These bits are always read as 0. The write value

should always be 0.

Address Range to be Compared

Specify the address range of PCICSAR1 to be

000: PCICSAR[n].CADR[31:12] compared (4 Kbytes)

001: PCICSAR[n].CADR[31:16] compared (64 Kbytes)

010: PCICSAR[n].CADR[31:20] compared (1 Mbyte)

011: PCICSAR[n].CADR[31:24] compared (16 Mbytes)

100: PCICSAR[n].CADR[31:25] compared (32 Mbytes)

101: PCICSAR[n].CADR[31:26] compared (64 Mbytes)

110: PCICSAR[n].CADR[31:27] compared (128 Mbytes)

111: PCICSAR[n].CADR[31:28] compared (256 Mbytes)

Valid only when PCICSCR1.SNPMD = 10 or 11.