C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 113

• Manufacturer Part Number: C8051T627-B-GM
• Description: 8-bit Microcontrollers - MCU UBS, 64K OTP MCU
• Manufacturer: Silicon Labs

Specifications of C8051T627-B-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051T627
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 48 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 3328 B
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 5.25 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFN-32
• Mounting Style: SMD/SMT
• Program Memory Type: EPROM

C8051T620/1/6/7 & C8051T320/1/2/3
18.1.2. EPROM In-Application Programming
The EPROM of the C8051T620/1/6/7 & C8051T320/1/2/3 devices has an In-Application Programming
option. In-Application Programming will be much slower than normal programming where the V
pro-
PP
gramming voltage is applied to the V
pin, but it allows a small number of bytes to be programmed any-
PP
where in the non-reserved areas of the EPROM. In order to use this option, V
must be within a specific
IO
range and a capacitor must be connected externally to the V
pin. Refer to Section “7. Electrical Charac-
PP
teristics” on page 34 for the acceptable range of values for V
and the capacitor on the V
pin.
IO
PP
Bytes in the EPROM memory must be written one byte at a time. An EPROM write will be performed after
each MOVX write instruction. The recommended procedure for writing to the EPROM is as follows:
1. Disable interrupts.
2. Change the core clock to 25 MHz or less.
3. Enable the VDD Monitor. Write 0x80 to VDM0CN.
4. Enable the VDD Monitor as a reset source. Write 0x02 to RSTSRC.
5. Disable the Prefetch engine. Write 0x00 to the PFE0CN register.
6. Set the VPP Pin to an open-drain configuration, with a ‘1’ in the port latch.
7. Set the PSWE bit (register PSCTL).
8. Write the first key code to MEMKEY: 0xA5.
9. Write the second key code to MEMKEY: 0xF1.
10.Enable in-application programming. Write 0x80 to the IAPCN register.
11. Using a MOVX write instruction, write a single data byte to the desired location.
12.Disable in-application EPROM programming. Write 0x00 to the IAPCN register.
13.Clear the PSWE bit.
14.Re-enable the Prefetch engine. Write 0x20 to the PFE0CN register.
15.Delay for at least 1 us.
16.Disable the programming hardware. Write 0x40 to the IAPCN register.
17.Restore the core clock (if changed in Step 2)
18.Re-enable interrupts.
Steps 8–11 must be repeated for each byte to be written.
When an application uses the In-Application Programming feature, the V
pin must be set to open-drain
PP
mode, with a ‘1’ in the port latch. The pin can still be used a as a general-purpose I/O pin if the program-
ming circuitry of the pin is disabled after all writes are completed by using the IAPHWD bit in the IAPCN
register (IAPCN.6). It is not necessary to disable the programming hardware if the In-Application Program-
ming feature has not been used.
Important Note: Software should delay for at least 1 µs after the last EPROM write before setting the
IAPHWD bit.
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