C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 143
C8051T627-B-GM
Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet
1.C8051T626-B-GM.pdf
(298 pages)
Specifications of C8051T627-B-GM
Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
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Pins P0.0-P2.7
The crossbar peripherals are assigned in priority order from top to bottom, according to this
diagram.
the Crossbar should be manually configured to skip the corresponding port pins.
Notes:
1. P2.4-P2.7 are only available in certain packages.
2. NSS is only pinned out when the SPI is in 4-wire mode.
Pin Number
SYSCLK
Function
Pin Skip
These boxes represent Port pins which can potentially be assigned to a peripheral.
Special Function Signals are not assigned by the crossbar. When these signals are enabled,
Pins can be “skipped” by setting the corresponding bit in PnSKIP to ‘1’.
Figure 22.3. Priority Crossbar Decoder Potential Pin Assignments
Settings
Special
Signals
CP0A
CP1A
CEX0
CEX1
CEX2
CEX3
CEX4
MISO
MOSI
SCK
NSS
SDA
RX0
SCL
CP0
CP1
RX1
Port
TX0
TX1
ECI
T0
T1
0
0 0 0 0 0 0 0 0
1
are capable of being assigned to crossbar peripherals.
1 2 3 4 5 6 7 0
C8051T620/1/6/7 & C8051T320/1/2/3
P0SKIP
P0
0 0 0 0 0 0 0 0
Rev. 1.2
1 2 3 4 5 6 7 0
P1SKIP
P1
0 0 0 0 0 0 0 0
1 2 3 4 5 6 7 0
P2SKIP
P2
1
143
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