C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 282
C8051T627-B-GM
Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet
1.C8051T626-B-GM.pdf
(298 pages)
Specifications of C8051T627-B-GM
Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
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C8051T620/1/6/7 & C8051T320/1/2/3
SFR Definition 29.1. PCA0CN: PCA Control
SFR Address = 0xD8; Bit-Addressable
282
Name
Reset
Bit
Type
7
6
5
4
3
2
1
0
Bit
Unused
Name
CCF4
CCF3
CCF2
CCF1
CCF0
CF
CR
R/W
CF
7
0
PCA Counter/Timer Overflow Flag.
Set by hardware when the PCA Counter/Timer overflows from 0xFFFF to 0x0000.
When the Counter/Timer Overflow (CF) interrupt is enabled, setting this bit causes the
CPU to vector to the PCA interrupt service routine. This bit is not automatically cleared
by hardware and must be cleared by software.
PCA Counter/Timer Run Control.
This bit enables/disables the PCA Counter/Timer.
0: PCA Counter/Timer disabled.
1: PCA Counter/Timer enabled.
Read = 0b, Write = Don't care.
PCA Module 4 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF4 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 3Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF3 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 2 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF2 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 1 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF1 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
PCA Module 0 Capture/Compare Flag.
This bit is set by hardware when a match or capture occurs. When the CCF0 interrupt
is enabled, setting this bit causes the CPU to vector to the PCA interrupt service rou-
tine. This bit is not automatically cleared by hardware and must be cleared by software.
R/W
CR
6
0
R
5
0
CCF4
R/W
Rev. 1.2
4
0
Function
CCF3
R/W
3
0
CCF2
R/W
2
0
CCF1
R/W
1
0
CCF0
R/W
0
0
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