C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 158

• Manufacturer Part Number: C8051T627-B-GM
• Description: 8-bit Microcontrollers - MCU UBS, 64K OTP MCU
• Manufacturer: Silicon Labs

Specifications of C8051T627-B-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051T627
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 48 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 3328 B
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 5.25 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFN-32
• Mounting Style: SMD/SMT
• Program Memory Type: EPROM

C8051T620/1/6/7 & C8051T320/1/2/3
SFR Definition 22.19. P2SKIP: Port 2 Skip
SFR Address = 0xD6
SFR Definition 22.20. P3: Port 3
SFR Address = 0xB0; Bit-Addressable
158
Name
Reset
Name
Reset
7:0
7:1
Bit
Bit
Type
Type
0
Bit
Bit
Unused
P2SKIP[7:0]
Name
P3[0]
Name
R
7
0
7
0
Unused.
Port 3 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
Port 2 Crossbar Skip Enable Bits.
These bits select Port 2 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
R
6
0
6
0
Description
R
5
0
5
0
Rev. 1.2
Don’t Care
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
R
4
0
4
0
P2SKIP[7:0]
R/W
Function
Write
R
3
0
3
0
R
2
0
2
0
0000000b
0: P3.0 Port pin is logic
LOW.
1: P3.0 Port pin is logic
HIGH.
R
1
0
1
0
Read
P3[0]
R/W
0
0
0
1