C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 230

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C8051T627-B-GM

Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T627-B-GM

Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
C8051T620/1/6/7 & C8051T320/1/2/3
SFR Definition 26.3. SBUF1: UART1 Data Buffer
SFR Address = 0xD3
230
Name
Reset
7:0 SBUF1[7:0
Bit
Type
Bit
Name
]
7
0
Serial Data Buffer Bits.
This SFR is used to both send
data from the UART and to
read received data from the
UART1 receive FIFO.
6
0
Description
5
0
Rev. 1.2
4
0
Writing a byte to SBUF1
initiates the transmission.
When data is written to
SBUF1, it first goes to the
Transmit Holding Register,
where it is held for serial
transmission. When the
transmit shift register is
available, data is trans-
ferred into the shift regis-
ter, and SBUF1 may be
written again.
SBUF1[7:0]
R/W
Write
3
0
2
0
Reading SBUF1 retrieves
data from the receive
FIFO. When read, the old-
est byte in the receive
FIFO is returned, and
removed from the FIFO.
Up to three bytes may be
held in the FIFO. If there
are additional bytes avail-
able in the FIFO, the RI1
bit will remain at logic 1,
even after being cleared
by software.
1
0
Read
0
0

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