C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 192

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C8051T627-B-GM

Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T627-B-GM

Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
C8051T620/1/6/7 & C8051T320/1/2/3
USB Register Definition 23.23. EOUTCSRH: USB0 OUT Endpoint Control High
Byte
USB Register Address = 0x15
USB Register Definition 23.24. EOUTCNTL: USB0 OUT Endpoint Count Low
USB Register Address = 0x16
192
Name
Reset
Name
Reset
Bit
5:0
Bit
7:0 EOCL[7:0] OUT Endpoint Count Low Byte.
Type
Type
7
6
Bit
Bit
DBOEN
Unused
Name
Name
ISO
DBOEN
R/W
7
0
7
0
Double-buffer Enable.
0: Double-buffering disabled for the selected OUT endpoint.
1: Double-buffering enabled for the selected OUT endpoint.
Isochronous Transfer Enable.
This bit enables/disables isochronous transfers on the current endpoint.
0: Endpoint configured for bulk/interrupt transfers.
1: Endpoint configured for isochronous transfers.
Read = 000000b. Write = don’t care.
EOCL holds the lower 8-bits of the 10-bit number of data bytes in the last received
packet in the current OUT endpoint FIFO. This number is only valid while OPRDY = 1.
R/W
ISO
6
0
6
0
R
5
0
5
0
Rev. 1.2
R
4
0
4
0
EOCL[7:0]
R
Function
Function
R
3
0
3
0
R
2
0
2
0
R
1
0
1
0
R
0
0
0
0

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