C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 205

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C8051T627-B-GM

Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T627-B-GM

Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
SFR Definition 24.4. SMB0ADM: SMBus Slave Address Mask
SFR Address = 0xCF
Name
Reset
Bit
7:1
Type
0
Bit
SLVM[6:0]
EHACK
Name
7
1
SMBus Slave Address Mask.
Defines which bits of register SMB0ADR are compared with an incoming address
byte, and which bits are ignored. Any bit set to 1 in SLVM[6:0] enables compari-
sons with the corresponding bit in SLV[6:0]. Bits set to 0 are ignored (can be either
0 or 1 in the incoming address).
Hardware Acknowledge Enable.
Enables hardware acknowledgement of slave address and received data bytes.
0: Firmware must manually acknowledge all incoming address and data bytes.
1: Automatic Slave Address Recognition and Hardware Acknowledge is Enabled.
6
1
C8051T620/1/6/7 & C8051T320/1/2/3
5
1
SLVM[6:0]
R/W
Rev. 1.2
4
1
Function
3
1
2
1
1
1
EHACK
R/W
0
0
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