C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 168

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C8051T627-B-GM

Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T627-B-GM

Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
C8051T620/1/6/7 & C8051T320/1/2/3
23.4. USB Clock Configuration
USB0 is capable of communication as a Full or Low Speed USB function. Communication speed is
selected via the SPEED bit in SFR USB0XCN. When operating as a Low Speed function, the USB0 clock
must be 6 MHz. When operating as a Full Speed function, the USB0 clock must be 48 MHz. Clock options
are described in Section “21. Oscillators and Clock Selection” on page 127. The USB0 clock is selected via
SFR CLKSEL (see SFR Definition 21.1).
Clock Recovery circuitry uses the incoming USB data stream to adjust the internal oscillator; this allows
the internal oscillator to meet the requirements for USB clock tolerance. Clock Recovery should be used in
the following configurations:
When operating USB0 as a Low Speed function with Clock Recovery, software must write 1 to the CRLOW
bit to enable Low Speed Clock Recovery. Clock Recovery is typically not necessary in Low Speed mode.
Single Step Mode can be used to help the Clock Recovery circuitry to lock when high noise levels are pres-
ent on the USB network. This mode is not required (or recommended) in typical USB environments.
USB Register Definition 23.5. CLKREC: Clock Recovery Control
USB Register Address = 0x0F
168
Name
Reset
Bit
4:0 Reserved Read = Variable. Must Write = 01111b.
Type
7
6
5
Bit
CRSSEN Clock Recovery Single Step.
CRLOW Low Speed Clock Recovery Mode.
Name
CRE
CRE
R/W
7
0
Clock Recovery Enable Bit.
This bit enables/disables the USB clock recovery feature.
0: Clock recovery disabled.
1: Clock recovery enabled.
This bit forces the oscillator calibration into ‘single-step’ mode during clock
recovery.
0: Normal calibration mode.
1: Single step mode.
This bit must be set to 1 if clock recovery is used when operating as a Low Speed USB
device.
0: Full Speed Mode.
1: Low Speed Mode.
CRSSEN
Communication Speed
R/W
6
0
Low Speed
Full Speed
CRLOW
R/W
5
0
Reserved
R/W
Rev. 1.2
4
0
Function
Reserved
Internal Oscillator / 8
R/W
Internal Oscillator
3
1
USB Clock
Reserved
R/W
2
1
Reserved
R/W
1
1
Reserved
R/W
0
1

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