C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 77

• Manufacturer Part Number: C8051T627-B-GM
• Description: 8-bit Microcontrollers - MCU UBS, 64K OTP MCU
• Manufacturer: Silicon Labs

Specifications of C8051T627-B-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051T627
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 48 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 3328 B
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 5.25 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: QFN-32
• Mounting Style: SMD/SMT
• Program Memory Type: EPROM

14. Comparator0 and Comparator1
C8051T620/1/6/7 & C8051T320/1/2/3 devices include two on-chip programmable voltage comparators:
Comparator0 is shown in Figure 14.1, Comparator1 is shown in Figure 14.2. The two comparators operate
identically with the following exceptions: (1) Their input selections differ as described in Section
“14.1. Comparator Multiplexers” on page 84; (2) Comparator0 can be used as a reset source.
The Comparators offer programmable response time and hysteresis, an analog input multiplexer, and two
outputs that are optionally available at the Port pins: a synchronous “latched” output (CP0 or CP1), or an
asynchronous “raw” output (CP0A or CP1A). The asynchronous signals are available even when the sys-
tem clock is not active. This allows the Comparators to operate and generate an output with the device in
STOP mode. When assigned to a Port pin, the Comparator outputs may be configured as open drain or
push-pull (see Section “22.4. Port I/O Initialization” on page 146). Comparator0 may also be used as a
reset source (see Section “20.5. Comparator0 Reset” on page 124).
The Comparator inputs are selected by the comparator input multiplexers, as detailed in Section
“14.1. Comparator Multiplexers” on page 84.
Comparator
Input Mux
Figure 14.1. Comparator0 Functional Block Diagram
CPT0MD
CP0 +
CP0 -
C8051T620/1/6/7 & C8051T320/1/2/3
+
-
CPT0CN
VDD
GND
CP0RIF
CP0FIF
Decision
Reset
Tree
Rev. 1.2
(SYNCHRONIZER)
D
SET
CLR
Q
Q
0
1
0
1
D
SET
CLR
Q
Q
CP0EN
Crossbar
0
1
EA
0
1
CP0A
Interrupt
CP0
CP0
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