C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 78

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C8051T627-B-GM

Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T627-B-GM

Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
C8051T620/1/6/7 & C8051T320/1/2/3
The Comparator output can be polled in software, used as an interrupt source, and/or routed to a Port pin.
When routed to a Port pin, the Comparator output is available asynchronous or synchronous to the system
clock; the asynchronous output is available even in STOP mode (with no system clock active). When dis-
abled, the Comparator output (if assigned to a Port I/O pin via the Crossbar) defaults to the logic low state,
and the power supply to the comparator is turned off. See Section “22.3. Priority Crossbar Decoder” on
page 142 for details on configuring Comparator outputs via the digital Crossbar. Comparator inputs can be
externally driven from –0.25 V to (V
trical specifications are given in Section “7. Electrical Characteristics” on page 34.
The Comparator response time may be configured in software via the CPTnMD registers (see SFR Defini-
tion 14.2 and SFR Definition 14.4). Selecting a longer response time reduces the Comparator supply cur-
rent.
78
Comparator
Input Mux
CPT1MD
Figure 14.2. Comparator1 Functional Block Diagram
CP1 +
CP1 -
DD
+
-
) + 0.25 V without damage or upset. The complete Comparator elec-
CPT1CN
VDD
GND
CP1RIF
CP1FIF
Rev. 1.2
(SYNCHRONIZER)
D
SET
CLR
Q
Q
0
1
0
1
D
SET
CLR
Q
Q
CP1EN
Crossbar
0
1
EA
0
1
CP1A
Interrupt
CP1
CP1

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