C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 242

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C8051T627-B-GM

Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T627-B-GM

Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
C8051T620/1/6/7 & C8051T320/1/2/3
SFR Definition 27.3. SPI0CKR: SPI0 Clock Rate
SFR Address = 0xA2
SFR Definition 27.4. SPI0DAT: SPI0 Data
SFR Address = 0xA3
242
Name
Reset
Name
Reset
7:0
7:0
Bit
Bit
Type
Type
Bit
Bit
SPI0DAT[7:0] SPI0 Transmit and Receive Data.
SCR[7:0]
Name
Name
7
0
7
0
SPI0 Clock Rate.
These bits determine the frequency of the SCK output when the SPI0 module is
configured for master mode operation. The SCK clock frequency is a divided ver-
sion of the system clock, and is given in the following equation, where SYSCLK is
the system clock frequency and SPI0CKR is the 8-bit value held in the SPI0CKR
register.
for 0 <= SPI0CKR <= 255
Example: If SYSCLK = 2 MHz and SPI0CKR = 0x04,
The SPI0DAT register is used to transmit and receive SPI0 data. Writing data to
SPI0DAT places the data into the transmit buffer and initiates a transfer when in
Master Mode. A read of SPI0DAT returns the contents of the receive buffer.
f
f
f
SCK
SCK
SCK
6
0
6
0
=
=
=
---------------------------------------------------------- -
2
------------------------- -
2
200kHz
2000000
5
0
5
0
SPI0CKR[7:0]
4
+
SYSCLK
1
Rev. 1.2
4
0
4
SPI0DAT[7:0]
0
SCR[7:0]
R/W
R/W
+
1
Function
Function
3
0
3
0
2
0
2
0
1
0
1
0
0
0
0
0

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