C8051T627-B-GM Silicon Labs, C8051T627-B-GM Datasheet - Page 131

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C8051T627-B-GM

Manufacturer Part Number
C8051T627-B-GM
Description
8-bit Microcontrollers - MCU UBS, 64K OTP MCU
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051T627-B-GM

Rohs
yes
Core
8051
Processor Series
C8051T627
Data Bus Width
8 bit
Maximum Clock Frequency
48 MHz
Program Memory Size
64 KB
Data Ram Size
3328 B
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 5.25 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-32
Mounting Style
SMD/SMT
Program Memory Type
EPROM
SFR Definition 21.3. OSCICN: Internal H-F Oscillator Control
SFR Address = 0xB2
Name
Reset
Bit
4:2
1:0
Type
7
6
5
Bit
SUSPEND
IFCN[1:0]
IOSCEN
Unused
IFRDY
IOSCEN
Name
R/W
7
1
Internal H-F Oscillator Enable Bit.
0: Internal H-F Oscillator Disabled.
1: Internal H-F Oscillator Enabled.
Internal H-F Oscillator Frequency Ready Flag.
0: Internal H-F Oscillator is not running at programmed frequency.
1: Internal H-F Oscillator is running at programmed frequency.
Internal Oscillator Suspend Enable Bit.
Setting this bit to logic 1 places the internal oscillator in SUSPEND mode. The inter-
nal oscillator resumes operation when one of the SUSPEND mode awakening
events occurs.
Read = 000b; Write = Don’t Care
Internal H-F Oscillator Frequency Divider Control Bits.
The Internal H-F Oscillator is divided by the IFCN bit setting after a divide-by-4 stage.
00: SYSCLK can be derived from Internal H-F Oscillator divided by 8 (1.5 MHz).
01: SYSCLK can be derived from Internal H-F Oscillator divided by 4 (3 MHz).
10: SYSCLK can be derived from Internal H-F Oscillator divided by 2 (6 MHz).
11: SYSCLK can be derived from Internal H-F Oscillator divided by 1 (12 MHz).
IFRDY
R
6
1
C8051T620/1/6/7 & C8051T320/1/2/3
SUSPEND
R/W
5
0
Rev. 1.2
R
4
0
Function
R
3
0
R
2
0
1
0
IFCN[1:0]
R/W
0
0
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