PCI-T64-O4-N2 Lattice, PCI-T64-O4-N2 Datasheet - Page 108

• Manufacturer Part Number: PCI-T64-O4-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 64B
• Manufacturer: Lattice

Specifications of PCI-T64-O4-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Figure 2-37
lates to the Local Interface. The table gives a clock-by-clock description of each event that occurs in the figure.
Figure 2-37. 64-bit Target Burst Write Transaction with a 64-bit Local Interface
and
Table 2-42
lt_command_out[3:0]
l_data_out[63:32]
l_data_out[31:0]
lt_cben_out[3:0]
lt_cben_out[7:4]
lt_64bit_transn
lt_address_out
lt_hdata_xfern
lt_ldata_xfern
bar_hit[5:0]
lt_access
ad[63:32]
cben[3:0]
cben[7:4]
ad[31:0]
devseln
ack64n
framen
req64n
lt_r_nw
lt_rdyn
illustrate a 64-bit burst write transaction. The figure shows how the PCI interface corre-
par64
irdyn
trdyn
par
clk
1
Don’t care
Don’t care
Don’t care
Don’t care
Command
Address
Bus
Don’t care
Don’t care
0x00
2
Don’t care
Address
Parity
3
Don’t care
Don’t care
Byte Enable 1
Byte Enable 2
4
Data 1
Data 2
108
Byte Enable 1
Byte Enable 2
Data Parity 1
Data Parity2
5
Bus Command
Address
6
0x01
Enable 3
Enable 4
Data 3
Data 4
Data 1
Data 2
Byte
Byte
7
Enable 5
Enable 6
Enable 3
Enable 4
Parity 3
Parity 4
Data 5
Data 6
Data 3
Data 4
Byte
Byte
Data
Data
Byte
Byte
8
Enable 5
Enable 6
Parity 5
Parity 6
Data 5
Data 6
Data
Data
Byte
Byte
9
Functional Description
Don’t care
Don’t care
Don’t care
Don’t care
0x00
PCI IP Core User’s Guide
10