PCI-T64-O4-N2 Lattice, PCI-T64-O4-N2 Datasheet - Page 133

• Manufacturer Part Number: PCI-T64-O4-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 64B
• Manufacturer: Lattice

Specifications of PCI-T64-O4-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Table 2-55. 32-bit Target Retry for Write Transaction (Continued)
Target Abort
Unlike the other types of disconnects, the state of
Abort.
Some possible reasons for a target abort are:
• Broken target
• I/O addressing error
• Address phase parity error
Figure 2-50
Figure 2-50. 32-bit Target Abort for Read Transaction
CLK
8
9
Figure 2-50
lt_addressout
lt_data_xfern
l_ad_in[31:0]
bar_hit[5:0]
cben[3:0]
lt_abortn
ad[31:0]
and
devseln
lt_r_nw
framen
lt_rdyn
The PCI master terminates the transaction by de-asserting the irdyn. The PCI IP core de-asserts the devseln
and stopn.
Idle
stopn
irdyn
trdyn
par
clk
Table 2-56
1
illustrates a Target Abort during a read transaction.
Don’t care
Command
Address
Bus
0x00
2
show a target abort on a read transaction.
Address
Parity
Don’t care
3
4
Byte Enable 1
Don’t care
5
irdyn
Don’t care
Data 1
133
6
Description
does not have any effect on termination during a Target
Data 1
0x01
7
Address
Data Parity
1
Don’t care
Don’t care
8
Don’t care
9
Don’t care
Don’t care
Functional Description
10
PCI IP Core User’s Guide
11
0x00
12