PCI-T64-O4-N2 Lattice, PCI-T64-O4-N2 Datasheet - Page 77

• Manufacturer Part Number: PCI-T64-O4-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 64B
• Manufacturer: Lattice

Specifications of PCI-T64-O4-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Figure 2-23. 64-bit Master Fast Back-to-Back Transaction
lm_burst_length[11:0]
lm_termination[2:0]
lm_burst_cnt[12:0]
lm_64bit_transn
lm_cben_in[3:0]
lm_cben_in[7:4]
lm_hdata_xfern
lm_ldata_xfern
l_ad_in[63:32]
lm_status[3:0]
l_ad_in[31:0]
lm_req64n
ad[63:32]
cben[3:0]
cben[7:4]
ad[31:0]
lm_gntn
lm_rdyn
devseln
ack64n
framen
req64n
par64
irdyn
trdyn
reqn
gntn
par
clk
1
2
Termination
Bus
3
Command 1
Bus Length
Address 1
Don’t care
Don’t care
Don’t care
( = 2 )
Bus
4
5
Don’t care
Don’t care
Address
Loading
Don’t care
Don’t care
6
Don’t care
Command1
Address 1
Don’t care
Enable 1
Enable 2
Data 1
Data 2
Byte
Byte
Bus
Don’t care
7
Address
Parity
Transaction
Bus Length
Don’t care
8
( = 2 )
Bus
Byte Enable 1
Byte Enable 2
Byte Enable 3
Byte Enable 4
Data 1
Data 2
Data 3
Data 4
9
77
Data Parity 1
Data Parity 2
10
Back2Back
Fast
command2
Bus Length
Don’t care
Don’t care
Address 2
Enable 3
Enable 4
11
Data 3
Data 4
( = 2 )
Byte
Byte
Bus
1
Address
Loading
Data Parity 3
Data Parity 4
12
Termination
Command2
Address 2
Don’t care
Don’t care
Enable 5
Enable 6
Normal
Data 5
Data 6
Byte
Byte
Bus
13
Don’t care
Address
Parity
Bus Length
14
( = 2 )
Byte Enable 5
Byte Enable 6
Byte Enable 7
Byte Enable 8
Transaction
Data 5
Data 6
Data 7
Data 8
Bus
Functional Description
Don’t care
15
Data Parity 5
Data Parity 6
Don’t care
PCI IP Core User’s Guide
16
Enable 7
Enable 8
Data 7
Data 8
Byte
Byte
1
17
Don’t care
Don’t care
Don’t care
Don’t care
Parity 7
Parity 8
Data
Data
Termination
Termination
18
Normal
Bus
0
19