R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 579
R0K561622S000BE
Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Specifications of R0K561622S000BE
Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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1. Set up the TPU channel to be used as the output trigger channel so that TGRA and TGRB are
2. Write H'FF to NDERH, and set bits G3CMS1, G3CMS0, G2CMS1, and G2CMS0 in PCR to
3. The timer counter in the TPU channel starts. When a compare match with TGRB occurs,
4. 4-phase complementary non-overlapping pulse output can be obtained subsequently by writing
output compare registers. Set the cycle in TGRB and the non-overlapping margin in TGRA,
and set the counter to be cleared by compare match B. Set the TGIEA bit in TIER to 1 to
enable the TGIA interrupt.
select compare match in the TPU channel set up in the previous step to be the output trigger.
Set bits G3NOV and G2NOV in PMR to 1 to select non-overlapping pulse output.
Write output data H'95 to NDRH.
outputs change from 1 to 0. When a compare match with TGRA occurs, outputs change from 0
to 1 (the change from 0 to 1 is delayed by the value set in TGRA).
The TGIA interrupt handling routine writes the next output data (H'65) to NDRH.
H'59, H'56, H'95... at successive TGIA interrupts.
If the DTC or DMAC is set for activation by a TGIA interrupt, pulse can be output without
imposing a load on the CPU.
Section 13 Programmable Pulse Generator (PPG)
Rev. 2.00 Sep. 16, 2009 Page 549 of 1036
REJ09B0414-0200
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