R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 818
R0K561622S000BE
Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Specifications of R0K561622S000BE
Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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Section 22 Flash Memory
Note:
Rev. 2.00 Sep. 16, 2009 Page 788 of 1036
REJ09B0414-0200
Bit
3 to 1
0
*
Bit Name
SCO
This is a write-only bit. This bit is always read as 0.
Initial
Value
All 0
0
R/W
R
(R)/W*
Description
Reserved
These are read-only bits and cannot be modified.
Source Program Copy Operation
Requests the on-chip programming/erasing program to
be downloaded to the on-chip RAM. When this bit is set
to 1, the on-chip program which is selected by FPCS or
FECS is automatically downloaded in the on-chip RAM
area specified by FTDAR.
In order to set this bit to 1, the RAM emulation mode
must be canceled, H'A5 must be written to FKEY, and
this operation must be executed in the on-chip RAM.
Dummy read of FCCS must be executed twice
immediately after setting this bit to 1. All interrupts must
be disabled during download. This bit is cleared to 0
when download is completed.
During program download initiated with this bit,
particular processing which accompanies bank-
switching of the program storage area is executed.
Before a download request, initialize the VBR contents
to H'00000000. After download is completed, the VBR
contents can be changed.
0: Download of the programming/erasing program is not
[Clearing condition]
•
1: Download of the programming/erasing program is
[Setting conditions] (When all of the following conditions
are satisfied)
•
•
•
requested.
When download is completed
requested.
Not in RAM emulation mode (the RAMS bit in
RAMER is cleared to 0)
H'A5 is written to FKEY
Setting of this bit is executed in the on-chip RAM
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