MC908QC16CDZE Freescale Semiconductor, MC908QC16CDZE Datasheet - Page 133

IC MCU 8BIT 16K FLASH 28-SOIC

MC908QC16CDZE

Manufacturer Part Number
MC908QC16CDZE
Description
IC MCU 8BIT 16K FLASH 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908QC16CDZE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC08QC
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
ESCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
For Use With
DEMO908QC16 - BOARD DEMO FOR MC908QC16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Fast Data Tolerance
13.3.3.6 Receiver Wakeup
So that the MCU can ignore transmissions intended only for other receivers in multiple-receiver systems,
the receiver can be put into a standby state. Setting the receiver wakeup bit, RWU, in SCC2 puts the
receiver into a standby state during which receiver interrupts are disabled.
Depending on the state of the WAKE bit in SCC1, either of two conditions on the RxD pin can bring the
receiver out of the standby state:
Freescale Semiconductor
1. Address mark — An address mark is a 1 in the MSB position of a received character. When the
Figure 13-8
error or a framing error. The fast stop bit ends at RT10 instead of RT16 but is still there for the stop bit
data samples at RT8, RT9, and RT10.
For an 8-bit character, data sampling of the stop bit takes the receiver
9 bit times × 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned character shown in
when the count of the transmitting device is 10 bit times × 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 8-bit
character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
when the count of the transmitting device is 11 bit times × 16 RT cycles = 176 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 9-bit
character with no errors is:
WAKE bit is set, an address mark wakes the receiver from the standby state by clearing the RWU
bit. The address mark also sets the ESCI receiver full bit, SCRF. Software can then compare the
character containing the address mark to the user-defined address of the receiver. If they are the
same, the receiver remains awake and processes the characters that follow. If they are not the
same, software can set the RWU bit and put the receiver back into the standby state.
shows how much a fast received character can be misaligned without causing a noise
RECEIVER
RT CLOCK
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
154 160
------------------------- -
170 176
------------------------- -
Figure 13-8. Fast Data
STOP
154
170
Figure
Figure
×
×
13-8, the receiver counts 154 RT cycles at the point
13-8, the receiver counts 170 RT cycles at the point
100
100
SAMPLES
=
=
DATA
3.90%.
3.53%.
IDLE OR NEXT CHARACTER
Functional Description
133

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