MC908QC16CDZE Freescale Semiconductor, MC908QC16CDZE Datasheet - Page 193

• Manufacturer Part Number: MC908QC16CDZE
• Description: IC MCU 8BIT 16K FLASH 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QC16CDZE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08QC
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: ESCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• For Use With: DEMO908QC16 - BOARD DEMO FOR MC908QC16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

output after the TIM1 overflows. At each subsequent overflow, the TIM1 channel registers (0 or 1) that
control the output are the ones written to last. T1SC0 controls and monitors the buffered output compare
function, and TIM1 channel 1 status and control register (T1SC1) is unused. While the MS0B bit is set,
the channel 1 pin, T1CH1, is available as a general-purpose I/O pin.
Channels 2 and 3 can be linked to form a buffered output compare channel whose output appears on the
T1CH2 pin. The TIM1 channel registers of the linked pair alternately control the output.
Setting the MS2B bit in TIM1 channel 2 status and control register (T1SC2) links channel 2 and channel 3.
The output compare value in the TIM1 channel 2 registers initially controls the output on the T1CH2 pin.
Writing to the TIM1 channel 3 registers enables the TIM1 channel 3 registers to synchronously control the
output after the TIM1 overflows. At each subsequent overflow, the TIM1 channel registers (2 or 3) that
control the output are the ones written to last. T1SC2 controls and monitors the buffered output compare
function, and TIM1 channel 3 status and control register (T1SC3) is unused. While the MS2B bit is set,
the channel 3 pin, T1CH3, is available as a general-purpose I/O pin.
16.3.4 Pulse Width Modulation (PWM)
By using the toggle-on-overflow feature with an output compare channel, the TIM1 can generate a PWM
signal. The value in the TIM1 counter modulo registers determines the period of the PWM signal. The
channel pin toggles when the counter reaches the value in the TIM1 counter modulo registers. The time
between overflows is the period of the PWM signal.
As
of the PWM signal. The time between overflow and output compare is the pulse width. Program the TIM1
to clear the channel pin on output compare if the polarity of the PWM pulse is 1 (ELSxA = 0). Program
the TIM1 to set the pin if the polarity of the PWM pulse is 0 (ELSxA = 1).
Freescale Semiconductor
Figure 16-3
POLARITY = 1
POLARITY = 0
(ELSxA = 0)
(ELSxA = 1)
In buffered output compare operation, do not write new output compare
values to the currently active channel registers. User software should track
the currently active channel to prevent writing a new value to the active
channel. Writing to the active channel registers is the same as generating
unbuffered output compares.
shows, the output compare value in the TIM1 channel registers determines the pulse width
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
T1CHx
T1CHx
OVERFLOW
Figure 16-3. PWM Period and Pulse Width
PULSE
WIDTH
PERIOD
COMPARE
OUTPUT
OVERFLOW
NOTE
COMPARE
OUTPUT
OVERFLOW
Functional Description
COMPARE
OUTPUT
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