MC908QC16CDZE Freescale Semiconductor, MC908QC16CDZE Datasheet - Page 250

• Manufacturer Part Number: MC908QC16CDZE
• Description: IC MCU 8BIT 16K FLASH 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QC16CDZE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08QC
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: ESCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• For Use With: DEMO908QC16 - BOARD DEMO FOR MC908QC16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Specifications
19.14 5.0-Volt SPI Characteristics
250
1. Numbers refer to dimensions in
2. All timing is shown with respect to 20% V
3. Time to data active from high-impedance state
4. Hold time to high-impedance state
5. With 100 pF on all SPI pins
Number
Diagram
10
11
1
2
3
4
5
6
7
8
9
(1)
Operating frequency
Cycle time
Enable lead time
Enable lag time
Clock (SPSCK) high time
Clock (SPSCK) low time
Data setup time (inputs)
Data hold time (inputs)
Access time, slave
Disable time, slave
Data valid time, after enable edge
Data hold time, outputs, after enable edge
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
CPHA = 0
CPHA = 1
Master
Slave
Master
Slave
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
(5)
Characteristic
(3)
Figure 19-11
(4)
DD
(2)
and 70% V
and
Figure
DD
19-12.
, unless noted; 100 pF load on all SPI pins.
Symbol
t
t
t
t
t
t
SCKH(M)
t
SCKH(S)
SCKL(M)
SCKL(S)
t
t
t
t
t
f
CYC(M)
Lead(S)
t
t
f
CYC(S)
t
A(CP0)
A(CP1)
OP(M)
Lag(S)
SU(M)
t
DIS(S)
t
HO(M)
OP(S)
SU(S)
t
t
HO(S)
H(M)
H(S)
V(M)
V(S)
1/2 t
1/2 t
t
t
f
CYC
CYC
OP
Min
CYC
CYC
dc
30
30
30
30
—
—
—
/128
2
1
1
1
0
0
0
0
–25
–25
–25
–25
Freescale Semiconductor
64 t
64 t
f
Max
OP
128
f
40
40
40
50
50
—
—
—
—
—
—
—
—
—
—
—
OP
CYC
CYC
/2
MHz
MHz
Unit
t
t
t
t
CYC
CYC
CYC
CYC
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns