MC908QC16CDZE Freescale Semiconductor, MC908QC16CDZE Datasheet - Page 95

IC MCU 8BIT 16K FLASH 28-SOIC

MC908QC16CDZE

Manufacturer Part Number
MC908QC16CDZE
Description
IC MCU 8BIT 16K FLASH 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908QC16CDZE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC08QC
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
ESCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
For Use With
DEMO908QC16 - BOARD DEMO FOR MC908QC16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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9.4 LVI Interrupts
The LVI module does not generate interrupt requests.
9.5 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-consumption standby modes.
9.5.1 Wait Mode
If enabled, the LVI module remains active in wait mode. If enabled to generate resets, the LVI module can
generate a reset and bring the MCU out of wait mode.
9.5.2 Stop Mode
If the LVIPWRD bit in the configuration register is cleared and the LVISTOP bit in the configuration
register is set, the LVI module remains active. If enabled to generate resets, the LVI module can generate
a reset and bring the MCU out of stop mode.
9.6 Registers
The LVI status register (LVISR) contains a status bit that is useful when the LVI is enabled and LVI reset
is disabled.
LVIOUT — LVI Output Bit
Freescale Semiconductor
This read-only flag becomes set when the V
when V
DD
voltage rises above V
Reset:
Read:
Write:
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
LVIOUT
Bit 7
0
= Unimplemented
V
Figure 9-2. LVI Status Register (LVISR)
TRIPF
6
0
0
V
V
Table 9-1. LVIOUT Bit Indication
TRIPR
DD
DD
< V
V
> V
< V
DD
DD
. (See
TRIPR
TRIPF
5
0
0
< V
TRIPR
DD
Table
voltage falls below the V
4
0
0
9-1.)
Previous value
R
3
0
0
LVIOUT
0
1
= Reserved
2
0
0
TRIPF
1
0
0
trip voltage and is cleared
Bit 0
R
0
LVI Interrupts
95

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