MC908QC16CDZE Freescale Semiconductor, MC908QC16CDZE Datasheet - Page 27

• Manufacturer Part Number: MC908QC16CDZE
• Description: IC MCU 8BIT 16K FLASH 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QC16CDZE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08QC
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: ESCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• For Use With: DEMO908QC16 - BOARD DEMO FOR MC908QC16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
$000C
$0000
$0001
$0002
$0003
$0004
$0005
$0006
$0007
$0008
$0009
$000A
$000B
Addr.
Port C Input Pullup Enable
Port D Input Pullup Enable
Port A Input Pullup Enable
Port B Input Pullup Enable
Data Direction Register C
Data Direction Register D
Data Direction Register A
Data Direction Register B
Register Name
Port A Data Register
Port B Data Register
Port C Data Register
Port D Data Register
Register (PTCPUE)
Register (PTDPUE)
Register (PTAPUE)
Register (PTBPUE)
See page 108.
See page 110.
See page 112.
See page 114.
See page 108.
See page 110.
See page 113.
See page 115.
See page 114.
See page 116.
See page 109.
See page 111.
Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 8)
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
(DDRC)
(DDRD)
(DDRA)
(DDRB)
(PTC)
(PTD)
(PTA)
(PTB)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
PTDPUE7 PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
PTBPUE7
OSC2EN
DDRB7
DDRD7
PTB7
PTD7
Bit 7
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented
PTBPUE6
DDRD6
DDRB6
PTB6
PTD6
R
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PTAPUE5
PTBPUE5
DDRA5
DDRB5
DDRD5
PTA5
PTB5
PTD5
5
0
0
0
0
0
0
0
0
0
0
0
PTAPUE4
PTBPUE4
DDRA4
DDRB4
DDRD4
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
PTD4
PTA4
PTB4
R
4
0
0
0
0
0
0
0
0
0
0
0
= Reserved
PTCPUE3 PTCPUE2 PTCPUE1 PTCPUE0
PTAPUE3
PTBPUE3
DDRA3
DDRB3
DDRD3
PTA3
PTB3
PTC3
PTD3
3
0
0
0
0
0
0
0
0
0
PTAPUE2
PTBPUE2
DDRC2
DDRD2
DDRB2
PTA2
PTB2
PTC2
PTD2
U = Unaffected
2
0
0
0
0
0
0
0
0
0
Direct Page Registers
PTAPUE1
PTBPUE1
DDRA1
DDRB1
DDRC1
DDRD1
PTC1
PTD1
PTA1
PTB1
1
0
0
0
0
0
0
0
0
PTAPUE0
PTBPUE0
DDRA0
DDRB0
DDRC0
DDRD0
PTC0
PTD0
PTA0
PTB0
Bit 0
0
0
0
0
0
0
0
0
27