MC908QC16CDZE Freescale Semiconductor, MC908QC16CDZE Datasheet - Page 213

IC MCU 8BIT 16K FLASH 28-SOIC

MC908QC16CDZE

Manufacturer Part Number
MC908QC16CDZE
Description
IC MCU 8BIT 16K FLASH 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908QC16CDZE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC08QC
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
ESCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
26
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
For Use With
DEMO908QC16 - BOARD DEMO FOR MC908QC16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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TOF — TIM2 Overflow Flag Bit
TOIE — TIM2 Overflow Interrupt Enable Bit
TSTOP — TIM2 Stop Bit
TRST — TIM2 Reset Bit
Freescale Semiconductor
This read/write flag is set when the counter reaches the modulo value programmed in the TIM2 counter
modulo registers. Clear TOF by reading the T2SC register when TOF is set and then writing a 0 to
TOF. If another TIM2 overflow occurs before the clearing sequence is complete, then writing 0 to TOF
has no effect. Therefore, a TOF interrupt request cannot be lost due to inadvertent clearing of TOF.
Writing a 1 to TOF has no effect.
This read/write bit enables TIM2 overflow interrupts when the TOF bit becomes set.
This read/write bit stops the counter. Counting resumes when TSTOP is cleared. Reset sets the
TSTOP bit, stopping the counter until software clears the TSTOP bit.
Setting this write-only bit resets the counter and the TIM2 prescaler. Setting TRST has no effect on
any other timer registers. Counting resumes from $0000. TRST is cleared automatically after the
counter is reset and always reads as 0.
1 = Counter has reached modulo value
0 = Counter has not reached modulo value
1 = TIM2 overflow interrupts enabled
0 = TIM2 overflow interrupts disabled
1 = Counter stopped
0 = Counter active
1 = Prescaler and counter cleared
0 = No effect
Reset:
Read:
Write:
Do not set the TSTOP bit before entering wait mode if the TIM2 is required
to exit wait mode. Also, when the TSTOP bit is set and the timer is
configured for input capture operation, input captures are inhibited until the
TSTOP bit is cleared.
When using TSTOP to stop the timer counter, see if any timer flags are set.
If a timer flag is set, it must be cleared by clearing TSTOP, then clearing the
flag, then setting TSTOP again.
Setting the TSTOP and TRST bits simultaneously stops the counter at a
value of $0000.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 5
Bit 7
TOF
0
0
Figure 17-4. TIM2 Status and Control Register (T2SC)
= Unimplemented
TOIE
6
0
TSTOP
5
1
TRST
NOTE
NOTE
4
0
0
3
0
0
PS2
2
0
PS1
1
0
Bit 0
PS0
0
Registers
213

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