HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 275

• Manufacturer Part Number: HD64F3664FPV
• Description: IC H8/3664 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3664FPV

• Core Size: 16-Bit
• Program Memory Size: 32KB (32K x 8)
• Oscillator Type: External
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• No. Of I/o's: 29
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.3.6
The I
Bit
0
Bit
7
6
2
C bus status register (ICSR) consists of status flags. Also see table 15.4.
I
2
Bit Name
SCP
Bit Name
ESTP
STOP
C Bus Status Register (ICSR)
Initial
Value
1
Initial
Value
0
0
R/W
W
R/W
R/W
R/W
Description
Start Condition/Stop Condition Prohibit
The SCP bit controls the issue of start/stop conditions
in master mode.
To issue a start condition, write 1 in BBSY and 0 in
SCP. A retransmit start condition is issued in the same
way. To issue a stop condition, write 0 in BBSY and 0 in
SCP. This bit is always read as 1. If 1 is written, the
data is not stored.
Description
Error Stop Condition Detection Flag
This bit is valid in I
[Setting condition]
When a stop condition is detected during frame
transfer.
[Clearing conditions]
•
•
Normal Stop Condition Detection Flag
This bit is valid in I
[Setting condition]
When a stop condition is detected during frame
transfer.
[Clearing conditions]
•
•
When 0 is written in ESTP after reading ESTP = 1
When the IRIC flag is cleared to 0
When 0 is written in STOP after reading STOP = 1
When the IRIC flag is cleared to 0
2
2
Rev. 6.00 Mar. 24, 2006 Page 245 of 412
C bus format slave mode.
C bus format slave mode.
Section 15 I
2
C Bus Interface (IIC)
REJ09B0142-0600