HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 292

• Manufacturer Part Number: HD64F3664FPV
• Description: IC H8/3664 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3664FPV

• Core Size: 16-Bit
• Program Memory Size: 32KB (32K x 8)
• Oscillator Type: External
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• No. Of I/o's: 29
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 15 I
15.4.9
Figures 15.13 to 15.16 show sample flowcharts for using the I
Rev. 6.00 Mar. 24, 2006 Page 262 of 412
REJ09B0142-0600
Sample Flowcharts
2
C Bus Interface (IIC)
Figure 15.13 Sample Flowchart for Master Transmit Mode
No
No
No
No
No
Write transmit data in ICDR
Write transmit data in ICDR
Yes
End of transmission?
Read BBSY in ICCR
Read ACKB in ICSR
Write BBSY =1 and
Read ACKB in ICSR
Write BBSY = 0 and
Read IRIC in ICCR
Clear IRIC in ICCR
Read IRIC in ICCR
Clear IRIC in ICCR
Clear IRIC in ICCR
Read IRIC in ICCR
Set MST = 1 and
TRS = 1 in ICCR
SCP = 0 in ICCR
SCP = 0 in ICCR
Transmit mode?
or ACKB = 1?
BBSY = 0?
ACKB = 0?
IRIC = 1?
IRIC = 1?
IRIC = 1?
Initialize
Start
End
Yes
Yes
Yes
Yes
Yes
Yes
No
No
[1] Initialization
[2] Test the status of the SCL and SDA lines.
[3] Select master transmit mode.
[4] Start condition issuance
[5] Wait for a start condition
[6] Set transmit data for the first byte
[7] Wait for 1 byte to be transmitted.
[8] Test the acknowledge bit,
[9] Set transmit data for the second and
[10] Wait for 1 byte to be transmitted.
[11] Test for end of tranfer
[12] Stop condition issuance
(slave address + R/W).
(After writing ICDR, clear IRIC
continuously)
transferred from slave device.
subsequent bytes.
immediately)
(After writing ICDR, clear IRIC
Master receive mode
2
C bus interface in each mode.