DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 1129
DF2328BVF25V
Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of DF2328BVF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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TSR5—Timer Status Register 5
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
:
:
:
Count Direction Flag
TCFD
0
1
R
7
1
TCNT counts down
TCNT counts up
—
—
6
1
Underflow Flag
R/(W)*
TCFU
0
1
5
0
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
R/(W)*
Overflow Flag
TCFV
0
1
4
0
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
—
—
3
0
—
—
2
0
Input Capture/Output Compare Flag B
R/(W)*
TGFB
Rev.6.00 Sep. 27, 2007 Page 1097 of 1268
H'FEA5
0
1
1
0
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading TGFB = 1
Input Capture/Output Compare Flag A
Note: 1. The DMAC is not supported in the H8S/2321.
output compare register
capture signal while TGRB is functioning as input
capture register
bit of MRB in DTC is 0
0
1
R/(W)*
TGFA
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt while
• When DMAC is activated by TGIA interrupt while
• When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning
• When TCNT value is transferred to TGRA by
DISEL bit of MRB in DTC is 0
DTA bit of DMABCR in DMAC*
Appendix B Internal I/O Registers
as output compare register
input capture signal while TGRA is functioning
as input capture register
REJ09B0220-0600
1
is 1
TPU5
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