DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 562

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Section 10 16-Bit Timer Pulse Unit (TPU)
Contention between TCNT Write and Overflow/Underflow: If there is an up-count or down-
count in the T
precedence and the TCFV/TCFU flag in TSR is not set.
Figure 10.57 shows the operation timing when there is contention between TCNT write and
overflow.
Multiplexing of I/O Pins: In the chip, the TCLKA input pin is multiplexed with the TIOCC0 I/O
pin, the TCLKB input pin with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O
pin, and the TCLKD input pin with the TIOCB2 I/O pin. When an external clock is input,
compare match output should not be performed from a multiplexed pin.
Interrupts and Module Stop Mode: If module stop mode is entered when an interrupt has been
requested, it will not be possible to clear the CPU interrupt source or the DMAC * or DTC
activation source. Interrupts should therefore be disabled before entering module stop mode.
Note: * The DMAC is not supported in the H8S/2321.
Rev.6.00 Sep. 27, 2007 Page 530 of 1268
REJ09B0220-0600
φ
Address
Write signal
TCNT
TCFV flag
2
state of a TCNT write cycle, and overflow/underflow occurs, the TCNT write takes
Figure 10.57 Contention between TCNT Write and Overflow
H'FFFF
Prohibited
TCNT write cycle
T
TCNT address
1
T
2
M
TCNT write data