DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 414
DF2328BVF25V
Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of DF2328BVF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 9 I/O Ports
9.6.2
Table 9.9 shows the port 5 register configuration.
Table 9.9
Name
Port 5 data direction register
Port 5 data register
Port 5 register
Port function control register 2
System control register
Notes: 1. Lower 16 bits of the address.
Port 5 Data Direction Register (P5DDR)
P5DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 5. Bits 7 to 4 are reserved. P5DDR cannot be read; if it is, an undefined value will be
read.
Setting a P5DDR bit to 1 makes the corresponding port 5 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P5DDR is initialized to H'0 (bits 3 to 0) by a reset, and in hardware standby mode. It retains its
prior state in software standby mode. As the SCI is initialized, the pin states are determined by the
P5DDR and P5DR specifications.
Rev.6.00 Sep. 27, 2007 Page 382 of 1268
REJ09B0220-0600
Bit
Initial value :
R/W
2. Value of bits 3 to 0.
Register Configuration
Port 5 Registers
:
:
Undefined Undefined Undefined Undefined
—
—
7
—
—
6
Abbreviation
P5DDR
P5DR
PORT5
PFCR2
SYSCR
—
—
5
—
—
4
R/W
W
R/W
R
R/W
R/W
P53DDR P52DDR P51DDR P50DDR
W
3
0
Initial Value
H'0 *
H'0 *
Undefined
H'30
H'01
2
2
W
2
0
W
1
0
Address *
H'FEB4
H'FF64
H'FF54
H'FFAC
H'FF39
W
0
0
1
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