DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 670
DF2328BVF25V
Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of DF2328BVF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 14 Serial Communication Interface (SCI)
Table 14.11 Receive Error Conditions
Receive Error
Overrun error
Framing error
Parity error
Figure 14.8 shows an example of the operation for reception in asynchronous mode.
Rev.6.00 Sep. 27, 2007 Page 638 of 1268
REJ09B0220-0600
RDRF
FER
1
Start
bit
0
D0
Abbreviation
ORER
FER
PER
Figure 14.8 Example of SCI Receive Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
D1
1 frame
Data
D7
Condition
completed while the RDRF flag
in SSR is set to 1
from the parity (even or odd) set
in SMR
When the next data reception is
When the stop bit is 0
When the received data differs
RXI interrupt
request
generated
Parity
bit
0/1
Stop
bit
1
Start
bit
0
RDR data read and RDRF
flag cleared to 0 in RXI
interrupt handling routine
D0
D1
Data
Data Transfer
Receive data is not
transferred from RSR to
RDR
Receive data is transferred
from RSR to RDR
Receive data is transferred
from RSR to RDR
D7
Parity
bit
ERI interrupt request
generated by framing
error
0/1
Stop
bit
0
Idle state
(mark state)
1
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