DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 1225
DF2328BVF25V
Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of DF2328BVF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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TSTR—Timer Start Register
TSYR—Timer Synchro Register
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Note:
If 0 is written to the CST bit during operation with the TIOC pin designated for output,
the counter stops but the TIOC pin output compare output level is retained. If TIOR
is written to when the CST bit is cleared to 0, the pin output level will be changed to
the set initial output value.
:
:
:
:
:
:
Notes:
—
—
—
—
7
0
7
0
1.
2.
To set synchronous operation, the SYNC bits for at least two channels must
be set to 1.
To set synchronous clearing, in addition to the SYNC bit , the TCNT clearing
source must also be set by means of bits CCLR2 to CCLR0 in TCR.
—
—
—
—
6
0
6
0
SYNC5
Timer Synchronization
CST5
R/W
0
1
R/W
5
0
5
0
TCNTn operates independently (TCNT presetting/
clearing is unrelated to other channels)
TCNTn performs synchronous operation
TCNT synchronous presetting/synchronous clearing
is possible
SYNC4
R/W
CST4
R/W
4
0
4
0
SYNC3
Rev.6.00 Sep. 27, 2007 Page 1193 of 1268
H'FFC0
H'FFC1
R/W
Counter Start
CST3
R/W
3
0
0
1
3
0
TCNTn count operation is stopped
TCNTn performs count operation
SYNC2
Appendix B Internal I/O Registers
R/W
CST2
2
0
R/W
2
0
SYNC1
R/W
CST1
1
0
R/W
1
0
REJ09B0220-0600
(n = 5 to 0)
SYNC0
R/W
CST0
0
0
R/W
(n = 5 to 0)
0
0
TPU
TPU
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