DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 566

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 Programmable Pulse Generator (PPG)
11.1.4
Table 11.2 summarizes the PPG registers.
Table 11.2 PPG Registers
Name
PPG output control register
PPG output mode register
Next data enable register H
Next data enable register L
Output data register H
Output data register L
Next data register H
Next data register L
Port 1 data direction register
Port 2 data direction register
Module stop control register
Notes: 1. Lower 16 bits of the address.
Rev.6.00 Sep. 27, 2007 Page 534 of 1268
REJ09B0220-0600
2. Bits used for pulse output cannot be written to.
3. When the same output trigger is selected for pulse output groups 2 and 3 by the PCR
Registers
Similarly, when the same output trigger is selected for pulse output groups 0 and 1 by
setting, the NDRH address is H'FF4C. When the output triggers are different, the NDRH
address is H'FF4E for group 2 and H'FF4C for group 3.
the PCR setting, the NDRL address is H'FF4D. When the output triggers are different,
the NDRL address is H'FF4F for group 0 and H'FF4D for group 1.
Abbreviation
PCR
PMR
NDERH
NDERL
PODRH
PODRL
NDRH
NDRL
P1DDR
P2DDR
MSTPCR
R/W
R/W
R/W
R/W
R/W
R/(W) *
R/(W) *
W
W
R/W
R/W
R/W
2
2
Initial Value
H'FF
H'F0
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'3FFF
Address *
H'FF46
H'FF47
H'FF48
H'FF49
H'FF4A
H'FF4B
H'FF4C/
H'FF4E *
H'FF4D/
H'FF4F *
H'FEB0
H'FEB1
H'FF3C
3
3
1

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