DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 241

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.9
The chip has a write data buffer function in the external data bus. Using the write data buffer
function enables external writes and DMA single address mode transfers to be executed in parallel
with internal accesses. The write data buffer function is made available by setting the WDBE bit
in BCRL to 1.
Figure 6.36 shows an example of the timing when the write data buffer function is used. When this
function is used, if an external write or DMA single address mode transfer * continues for 2 states
or longer, and there is an internal access next, only an external write is executed in the first state,
but from the next state onward an internal access (on-chip memory or internal I/O register
read/write) is executed in parallel with the external write rather than waiting until it ends.
Note: * The DMAC is not supported in the H8S/2321.
Note: n = 0 to 7
External
space
write
Internal address bus
Internal read signal
Figure 6.36 Example of Timing when Write Data Buffer Function is Used
Write Data Buffer Function
HWR, LWR
D
A
15
23
to D
to A
CSn
0
0
T
1
On-chip memory read Internal I/O register read
T
Internal memory
2
External write cycle
External address
Rev.6.00 Sep. 27, 2007 Page 209 of 1268
T
W
Internal I/O register address
T
W
Section 6 Bus Controller
REJ09B0220-0600
T
3

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