DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 592

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 12 8-Bit Timers
12.2
12.2.1
TCNT0 and TCNT1 are 8-bit readable/writable up-counters that increment on pulses generated
from an internal or external clock source. This clock source is selected by clock select bits CKS2
to CKS0 in TCR. The CPU can read or write to TCNT0 and TCNT1 at all times.
TCNT0 and TCNT1 comprise a single 16-bit register, so they can be accessed together by a word
transfer instruction.
TCNT0 and TCNT1 can be cleared by an external reset input or by a compare match signal.
Which signal is to be used for clearing is selected by clock clear bits CCLR1 and CCLR0 in TCR.
When a timer counter overflows from H'FF to H'00, OVF in TCSR is set to 1.
TCNT0 and TCNT1 are each initialized to H'00 by a reset and in hardware standby mode.
12.2.2
TCORA0 and TCORA1 are 8-bit readable/writable registers. TCORA0 and TCORA1 comprise a
single 16-bit register so they can be accessed together by a word transfer instruction.
TCORA is continually compared with the value in TCNT. When a match is detected, the
corresponding CMFA flag in TCSR is set. Note, however, that comparison is disabled during the
T
Rev.6.00 Sep. 27, 2007 Page 560 of 1268
REJ09B0220-0600
2
Bit
Initial value :
R/W
Bit
Initial value :
R/W
state of a TCOR write cycle.
Register Descriptions
Timer Counters 0 and 1 (TCNT0, TCNT1)
Time Constant Registers A0 and A1 (TCORA0, TCORA1)
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
:
:
15
15
0
1
14
14
0
1
13
13
0
1
TCORA0
12
12
TCNT0
0
1
11
11
0
1
10
10
0
1
9
0
9
1
8
0
8
1
7
0
7
1
6
0
6
1
5
0
5
1
TCORA1
TCNT1
4
0
4
1
3
0
3
1
2
0
2
1
1
0
1
1
0
0
0
1

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