HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 205

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

7.2.7
BDMRB is a 32-bit read/write register. BDMRB specifies bits masked in the break data specified
by BDRB. A power-on reset initializes BDMRB to H'00000000.
Bits 31 to 0—Break Data Mask Register B31 to B0 (BDMB31 to BDMB0): Specifies bits in
the channel B break data bits specified by BDRB (BDB31—BDB0).
n = 31 to 0
Notes: 1. Specify an operand size when including the value of the data bus in the break condition.
Bits 31 to 0:
BDMBn
0
1
Initial value:
Initial value:
Initial value:
Initial value:
2. When a byte size is specified as a break condition, the same-byte data must be set in
Break Data Mask Register B (BDMRB)
bits 15 to 8 and bits 7 to 0 in BDRB for the break data.
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Description
Break data BDBn of channel B is included in the break condition
Break data BDBn of channel B is masked and is not included in the break
condition
BDMB31 BDMB30 BDMB29 BDMB28 BDMB27 BDMB26 BDMB25 BDMB24
BDMB23 BDMB22 BDMB21 BDMB20 BDMB19 BDMB18 BDMB17 BDMB16
BDMB15 BDMB14 BDMB13 BDMB12 BDMB11 BDMB10 BDMB9 BDMB8
BDMB7 BDMB6 BDMB5 BDMB4 BDMB3 BDMB2 BDMB1 BDMB0
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
Rev. 5.00, 09/03, page 159 of 760
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
(Initial value)
R/W
R/W
R/W
R/W
24
16
0
0
8
0
0
0