HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 283

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Bits 10 and 9—Area 0 Burst ROM Control (A0BST1, A0BST0): Specify whether to use burst
ROM in physical space area 0. When burst ROM is used, these bits set the number of burst
transfers.
Bits 8 and 7—Area 5 Burst Enable (A5BST1, A5BST0): Specify whether to use burst ROM
and PCMCIA burst mode in physical space area 5. When burst ROM and PCMCIA burst mode
are used, these bits set the number of burst transfers.
Bits 6 and 5—Area 6 Burst Enable (A6BST1, A6BST0): Specify whether to use burst ROM
and PCMCIA burst mode in physical space area 6. When burst ROM and PCMCIA burst mode
are used, these bits set the number of burst transfers.
Bit 10: A0BST1
0
1
Bit 8: A5BST1
0
1
Bit 9: A0BST0
0
1
0
1
Bit 7: A5BST0
0
1
0
1
Description
Access area 0 accessed as ordinary memory
Access area 0 accessed as burst ROM (4 consecutive
accesses). Can be used when bus width is 8, 16, or 32.
Access area 0 accessed as burst ROM (8 consecutive
accesses). Can be used when bus width is 8 or 16.
Should not be specified when bus width is 16 or 32.
Access area 0 accessed as burst ROM (16 consecutive
accesses). Can be used only when bus width is 8.
Should not be specified when bus width is 16 or 32.
Description
Access area 5 accessed as ordinary memory
Burst access of area 5 (4 consecutive accesses). Can
be used when bus width is 8, 16, or 32.
Burst access of area 5 (8 consecutive accesses). Can
be used when bus width is 8 or 16. Should not be
specified when bus width is 32.
Burst access of area 5 (16 consecutive accesses). Can
be used only when bus width is 8. Should not be
specified when bus width is 16 or 32.
Rev. 5.00, 09/03, page 237 of 760
(Initial value)
(Initial value)