HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 684

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Bit 5—D/A Enable (DAE): Controls D/A conversion, together with bits DAOE0 and DAOE1.
When the DAE bit is cleared to 0, D/A conversion is controlled independently in channels 0 and 1.
When the chip enters standby mode while D/A conversion is enabled, the D/A output is held and
the analog power-supply current is equivalent to that during D/A conversion. To reduce the analog
power-supply current in standby mode, clear the DAOE0 and DAOE1 bits and disable the D/A
output.
Bit 7: DAOE1
0
0
0
1
1
1
When the DAE bit is set to 1, even if bits DAOE0 and DAOE1 in DACR and the ADST bit in
ADCSR are cleared to 0, the same current is drawn from the analog power supply as during A/D
and D/A conversion.
Bits 4 to 0—Reserved: Read-only bits, always read as 1.
Rev. 5.00, 09/03, page 638 of 760
Bit 6: DAOE0
0
1
1
0
0
1
Bit 5: DAE
0
1
0
1
Description
D/A conversion is disabled in channels 0 and 1
D/A conversion is enabled in channel 0
D/A conversion is disabled in channel 1
D/A conversion is enabled in channels 0 and 1
D/A conversion is disabled in channel 0
D/A conversion is enabled in channel 1
D/A conversion is enabled in channels 0 and 1
D/A conversion is enabled in channels 0 and 1
(Initial value)

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