HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 581

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 3—Modem Control Enable (MCE): Enables modem control signals CTS and RTS.
Note: * CTS is fixed at active 0 regardless of the input value, and RTS is also fixed at 0.
Bit 2—Transmit FIFO Data Register Reset (TFRST): Disables the transmit data in the transmit
FIFO data register and resets the data to the empty state.
Note: * Reset is executed in a reset or in standby mode.
Bit 1—Receive FIFO Data Register Reset (RFRST): Disables the receive data in the receive
FIFO data register and resets the data to the empty state.
Note: * Reset is executed in a reset or in standby mode.
Bit 0—Loop-Back Test (LOOP): Internally connects the transmit output pin (TXD) and receive
input pin (RXD) and enables loop-back testing.
Bit 3: MCE
0
1
Bit 2: TFRST
0
1
Bit 1: RFRST
0
1
Bit 0: LOOP
0
1
Description
Modem signal disabled *
Modem signal enabled
Description
Reset operation disabled *
Reset operation enabled
Description
Reset operation disabled *
Reset operation enabled
Description
Loop back test disabled
Loop back test enabled
Rev. 5.00, 09/03, page 535 of 760
(Initial value)
(Initial value)
(Initial value)
(Initial value)